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Solra Bizna

[MC1.7.10][OC1.6+]65C02 architecture "OCMOS", version 0.5.2 released 2017-03-27, beta-quality

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Since I had to write a 65C02 emulator core for work anyway, and since there is still a distinct lack of finished "real CPU" architecture modules for OpenComputers, I just spent the last couple weekends making one. All features that have been tested work, though the testing has not been very thorough.

The Minecraft 1.7.10 version can be found here, and the (very dry) documentation for both the hardware and the BIOS is here. It should build for later Minecraft versions with only minor modifications; I built it for 1.7.10 because that's the version I use. (Source code is on GitHub.)

Please report bugs on the GitHub issue tracker, though don't be surprised if it takes me a while to respond there (GitHub notifications aren't working for me). Feel free to poke me on IRC; SolraBizna on irc.esper.net or irc.tejat.net.


  • Total control over memory usage 
  • Fully persistable
  • Technically supports almost 32MiB of main memory through the MMU*
  • Non-maskable watchdog timer
  • Interrupts occur on signal delivery, allowing interrupt-based signal handling
  • Straightforward memory mapped interfaces for disk drives, redstone, and battery
  • "Serial terminal" allows basic, simple screen-and-keyboard based UIs
  • Support via UIF for all components accessible from Lua, including userdata support
  • Standard BIOS
    • Very basic interactive debugger, can load S-records either pasted or manually entered
    • Bootloader can boot S-records and binary images from managed and unmanaged drives
    • Basic signal handling for keyboard input, including a blinking cursor
    • Can selectively turn on/off BIOS features from booted code
  • User Mode (barely tested) allows memory protection, multitasking—even total virtualization with some work
  • Sync safe (only with a deadline setting of 10ms or so)
  • The CPU has around 512 bytes of built-in memory, allowing simple programs to run without any RAM modules

*If you dial up the memory amount high enough, you may get disconnection errors due to an oversight in OpenComputers' API. This will hopefully be fixed soon, whether through a workaround in OCMOS or a change to OpenComputers. Memory modules are, by default, smaller than those for Lua computers; in my own testing with two tier 3.5 memory modules (256KiB), I did not experience any disconnects. Meanwhile, since the 65C02 can do so much with very limited memory, you shouldn't experience any serious problems.

Version History


  • Architecture now has NoMemoryRequirements annotation, allowing you to build microcontrollers, drones, and robots without memory modules if all you need is the stack and zero page.
  • WAI no longer spins pointlessly, and now reduces host CPU usage when called.
  • Now, by default, if runThreaded runs for longer than one second without meeting the cycle budget, it will give up on doing so and briefly sleep. This prevents degenerate MMU slowdowns from ruining a world or server.


  • Works on the server now. (The LAST change I made before releasing 0.5 broke this.)
  • biosOptional option means you get the Standard BIOS even if no EEPROM is installed. This is slightly cheaty, but since there's not a crafting recipe for the Standard BIOS yet...


  • Initial release

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The "Enhanced" Apple IIe did. The others, as with earlier Apples, used a plain old NMOS 6502. The 65C02 is the CMOS version of the processor. It's largely compatible with the NMOS one, but has more instructions, fewer bugs, and draws less power at high clock speeds. Most of the undocumented instructions of the NMOS processor became documented no-ops, breaking the programs that relied on them. Apple BASIC should be compatible; someone should try to load it up...

I forgot to mention in the OP that I specifically emulate the Western Design Center version of the chip, so it has the RMB*/SMB*/BBR*/BBS* instructions. While I was programming the BIOS, those quickly became my favorite instructions in the whole set.

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