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Found 3 results

  1. The following document is a DRAFT. Any information here may be revised at any time, and suggestions are more than welcome. Rev. #2017010401 (0.1.1) Abstract This draft defines the NNR (Network to Network Routing) protocol as part of the OCranet family of protocols. This document outlines how dynamic routing holds networks together in an NNR enabled OCranet network, how signalling is performed to control these networks, and the format of addressing used. This protocol is NOT the base protocol for OCranet networksand REQUIRES the support of specifications detailed in OETF #4; OCR
  2. The following document is a DRAFT. Any information here may be revised at any time, and suggestions are more than welcome. Rev. #2017032401 (0.2.0) Abstract This draft defines the OCR (OCranet Relay) protocol as part of the OCranet family of protocols. This document outlines how OCR forms connections, how data is fowarded, and the structure of a data segment used in an OCR network. Rationale An agreement between computers in terms of how to communicate is important in any data network. In the past, there have been several attempts to build networks to transfer data be
  3. This is something that I'm scratching my head over. It would be great if this were written in C (and if I had a dollar for every time I thought that... I think I'm up to about $5 now?), but alas, it isn't, and thus multiple return values are very much out of the question. Having a think about it, it would make sense if the bus ran at 1MHz. The Z80 currently runs at 2MHz, and all memory accesses on the Z80 tend to take a minimum of 3 cycles (in reality it's more like 2 cycles followed by a DRAM refresh but we'll just skip on that and assume the whole window is available for it). The MIPS3 core
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